Monthly Archives: May 2014

Conclusion

We have presented the techniques of radar signal detection, as well as the related performance analyses. The

following conclusions can be drawn.

• Among various detection criteria, the Neyman-Pearson criterion is particularly well suited to radar detec­tion, owing to its concepts of a priori fixed Pfa and maximized Pd.

• The coherent detection, in the form of a matched filter or a cross-correlation, is the optimal detection for an exactly known signal (i. e., phase, amplitude, and Doppler frequency are known) in a background of white noise.

• In a typical radar application, the range between the target and the radar represents a very large number of transmitted signal wavelengths. This makes specifying the phase of the return signal extremely difficult, and a noncoherent detection has to be used.

• The noncoherent detection is inferior to the coherent detection for low input signal-to-noise ratios and approximates the coherent detection for high input signal-to-noise ratios.

• There is an inherent conflict between long-range detection and high-range-resolution capability for the unity time-bandwidth signal. Large time-bandwidth signals such as an LFM signal do not have such a conflict.

• Large time-bandwidth signals can be described by the ambiguity function or the Wigner-Ville distribution. The Radon-ambiguity transform can be used to detect multiple LFM signals.

RUNTIME RECONFIGURATION

A reconfigurable computing system can have its functional­ity updated during execution, resulting in reduced resource requirements. A runtime reconfigurable system partitions a design temporally so that the entire design does not need to be resident in the FPGA at any given moment (38, 39). Configuration and execution can be overlapped to improve performance in the presence of reconfiguration latency. Us­ing this technique, designs that are larger than the physi­cal hardware resources can be realized in an efficient man­ner.

Dharma, a time-sharing FPGA architecture, was pro­posed that contains a functional block and an interconnect network (40). The interconnect and the logic can be time – shared. The authors proposed that emulated design topol­ogy be levelized in a folded pipeline manner; this topology simplifies the architecture and provides predictable inter­connect delay (Fig. 7).

Figure 4. Example of a logic emulation system. Arrays ofFPGAs and FPICs reside on the emulation modules. The user inputs the emulated design netlist and commands from the workstation. The workstation and control processor personalize the emulation modules, which are used in place of the emulated chip.

Figure 5. SPLASH2 architecture. Each board contains 16 FPGAs, XI through XI6. The blocks Ml through Ml6 are local memories of the FPGAs. A simplified 36-bit bus crossbar, with no permutation of the bit-lines within each bus, interconnects the 16 FPGAs. Another 36-bit bus connects the FPGAs in daisy-chain fashion. The local memories are dual ported with one port connecting to the FPGAs and the other port connecting to the external bus.

Single context, partially reconfigurable, and multiple context architectures have been proposed. In a single context system, any changes to the functionality of the FPGA involves reloading the entire bitstream; early FP – GAs were ofthis type. This scheme has the disadvantage of long reconfiguration time. Partial reconfiguration, as sup­ported by the Xilinx Virtex FPGAs (10), allows portions of the FPGA to be changed via a memory mapped scheme, whereas the other portions of the FPGA continue function­ing. Compared with a single context scheme, area overhead is associated in providing this feature. Multiple context architectures, such as NEC’s Dynamically Reconfigurable Processor (DRP) (41), allow a number of complete configu­rations to be stored in the fabric simultaneously and thus reconfiguration can be achieved in a small number of cy­
cles. This architecture has the shortest context switch time, however, a larger area overhead is associated with imple­mentation of this scheme.

The logical unit of reconfiguration could be at a num­ber of levels including the application, instruction, task, block, or sub-block level. An example of application-level reconfiguration could simply involve loading a runtime – dependent bitstream to support a particular coding stan­dard in a video coding application. The Dynamic Instruc­tion Set Computer (DISC) (42) supported demand-driven modification of the instruction set through partial reconfig­uration. The commercial Stretch processor (43) combines reconfigurable fabric with a processor to support the exe­cution of custom instructions implemented on a reconfig – urable fabric. Furthermore, the fabric can be reconfigured at runtime and the design environment is software-centric, with programming of the processor being in Stretch C.

An operating system for guarantee-based scheduling of hard real-time tasks has been proposed (44). Under control of software running on a microprocessor, task circuits can be scheduled online and placed in a suitable free space in a hardware task area. Communications between tasks and I/O are done though a task communication bus, and termi­nation of a task frees the reconfigurable resources used. It

Control FPGA

Control FPGA

FPGA +

FPGA +

4x 4GB DDR2

4x 4GB DDR2

DRAM+

DRAM+

4x MGT

4x MGT

4xIB4X Infiniband

4xIB4X Infiniband

Control FPGA

FPGA +

4x 4GB DDR2 DRAM+

4x MGT

138

Control FPGA

Control FPGA

FPGA +

FPGA +

4x 4GB DDR2

4x 4GB DDR2

DRAM+

DRAM+

4x MGT

4x MGT

4x IB4X Infiniband

4x IB4X Infiniband

Figure 6. BEE2 Compute Module block diagram. Compute modules can be interconnected via the Infiniband IB4X connectors, either directly or via a 10-Gigabit Ethernet switch. The 100-Base T Ethernet can be used for control, monitoring, or data archiving.

Figure 7. Dynamic Architecture for FPGA-based systems. The architecture contains a functional block and an interconnect network. The interconnect and the logic can be time shared. The emulated design topology is levelized in a folded pipeline manner. The levelized topology simplifies the architecture with predictable interconnect delay.

was shown that hardware in the hardware task area can be shared by tasks and the overheads associated with its implementation on a partially configurable platform were acceptably low.

A pipeline stage is often a convenient block-level unit for reconfiguration. In incremental pipeline reconfigura­tion (45), an application with S pipeline stages can be im­plemented in an FPGA with fewer than S physical pipeline stages. This is done by adding one pipeline stage and re­moving one pipeline stage in each stage of the computation. Execution and computation can be overlapped.

Runtime reconfiguration can be done at even lower lev­els. A crossbar switch which employs runtime reconfigu­ration of the FPGA’s routing resources has been described

(46) . This scheme was able to achieve density, switch up­date latency and performance higher than possible using conventional means.

Tools have been developed to support runtime reconfig­uration. For example, JBits (47) is a set of Java classes that provide an application programming interface to the Xil – inx FPGA bitstream. The interface operates on either bit­streams generated by Xilinx design tools or on bitstreams read back from actual hardware and allows the FPGA logic and routing resources to be modified.

TECHNICAL SOLUTION

The block diagram of a multiprogrammable dual-chamber pacemaker in Fig. 5 affords an overview of the basic compo­nents. Atrial and ventricular channels each possess separate input and output amplifiers connected to the myocardium through the atrial or the ventricular electrode. The program memory digitally controls the adjustment of the impulse en­ergy through the amplitude and the impulse duration of the stimulus and the sensitivity of the input amplifier. The cen­tral, quartz-controlled clock and the counter keep the timing of all control processes, such as pacing rate, refractory period, hysteresis, and program transmission. Programming is per­formed inductively through a program amplifier with a de­coder, a control circuit, and a register that stores the tempo­rary and permanent programs.

Figure 5. Block diagram of the circuitry of a multiprogrammable dual-chamber pacemaker. It shows the following major components: input and output stages for the atrial and ventricular channels, main control logic, memory for internal data storage, and the communication unit for bidirectional data transmission, which is activated by closing the reed switch with the magnet in the programming head.

Figure 7. Hybrid circuit of a rate-adaptive dual-chamber pacemaker (INOS, Biotronik, Inc.). The back side (right) holds several discrete components such as quartz crystal, reed switch, telemetry coil, capacitors, and resistors. The front side (center) contains two VLSI chips (pace­maker and monitoring chips) and carries a daughter board (left) with a third VLSI chip for the rate-adaptation functions.

Figure 6 shows the construction of an implant, in which the two significant components are the lithium battery, occu­pying the right two-thirds of the housing, and the hybrid cir­cuit. The pacemaker housing consists of a dual-sectioned tita­nium capsule, which is reliably sealed by laser welding and has a long-term resistance to corrosion. The electrode connec­tion block consists of a cast epoxy resin head with hermeti­cally sealed feedthrough. The hybrid substrate contains all electronic components, including a coil that enables bidirec­tional inductive telemetry for postoperative programming through a programmer. Some applications for this program­mer are an inductive transmission of pacing and function pa­

Connector block

Battery

Figure 6. Major components of an assembled dual-chamber pace­maker. The hermetically sealed titanium housing contains the hybrid (left), which holds the IC and all other electronic components, and the battery (right), which occupies about two-thirds of the housing. Leads are connected to the device via the cast epoxy resin head.

rameters or intracardiac signals and such operating parame­ters as battery current, voltage, and internal resistance; electrode impedance; and patient information (12). The value of programmability not only lies in the possibility of postoper­ative corrections, but allows also an effective reduction of the variety of pacemaker types, lowering the overall costs in­volved.

Technical Realization of Circuits

Because the implant often has a life-supporting function, high demands are placed on the electronics in the pacemaker. Some of these expectations are extreme reliability and op­erating safety, the smallest possible and lightest construction, operation at low supply voltages of 2 V, and constancy of all function parameters, even with falling battery voltage as a result of discharging. These requirements are met by a host of special technical solutions for circuits and highly developed production processes.

Integrated Circuit. The biological demands for miniaturiza­tion and minimal energy consumption are best met through the monolithic integration of as many components as possible onto one chip. All analog and digital function blocks necessary for standard pacemaking are integrated onto one chip using low-voltage CMOS (complementary metallic oxide semicon­ductor) technology. The central control unit, the functional units for pacing and sensing, telemetry, charge pump, pro­gram amplifier, oscillator, and reference voltage sources are included in this group. The control signal is amplified with a two-level bandpass with several ranges of sensitivity. The pacing amplitude is created with the help of a charge pump in combination with a programmable voltage multiplier and is adjustable from 0.1 to 9.6 V. The programmability of closely stepped settings and the large range for adjusting pacing am­plitude and sensitivity with separate programmability for the atrial and ventricular channel place great demands on the semiconductor technology of the pacemaker circuit. A 2 pm silicon gate technology was used. Approximately 100,000transistors were integrated on a surface with an area of 70 mm2. The operating voltage ranges from 1.8 to 3.0 V. Current developments use technologies allowing structures between

3 and 0.8 um.

Hybrid Design. As in many other fields of hardware and software development, modularity as a construction principle plays a key role in pacemaker technology. The previously noted complex functions of modern pacemaker systems are realized by individual technical modules composed of circuits. From here, a whole family of devices with different functions emerges easily. These devices are each tailored to the individ­ual therapeutic needs and provide optimal and cost-effective therapy. The complexity of such circuits exceeds the present technical possibilities of a monolithic solution. Thus, inte­grated and passive components are joined by a hybrid circuit. Figure 7 shows the modular circuit construction of a com­pletely assembled rate-adaptive dual-chamber pacemaker cir­cuit using hybrid technology. The pacemaker circuit contains three VLSI components. The pacemaker chip is made up of the control logic, analog input and output amplifiers and te­lemetry; the monitoring chip is composed of the event counter and the trend monitor (Fig. 7, center). The third VLSI-chip mounted on a daughter board includes a microprocessor for rate adaptation functions (Fig. 7, left). Passive components including the telemetry coil, reed switch, and quartz crystal can be seen in Fig. 7, right. The versatile pacemaker chip can be applied with a dual-chamber system, as shown in the hy­brid circuit, as well as in a single-chamber pacemaker. Like­wise, the monitoring chip can be integrated into other sys­tems. The chips are produced as application-specific integrated circuits (ASIC) using low-voltage CMOS technol­ogy. The no-load current is approximately 7 uA for the entire dual-chamber pacemaker circuit. With atrial and ventricular pacing at a rate of 60 bpm, approximately 30 uA are taken up from the lithium battery (2.0 Ah); that corresponds to an operation time of 8 years.

As a form of interconnection technology, hybrid technology plays a key role in producing electronics for implants. Its task is to create the connection between the different integrated components and the passive components. To meet the grow­ing demands for reliability and packing density, production technology for manufacturing modern multilayer hybrid cir­cuits has consistently been developed further. Laminate tech­nology with dielectric foils allows the necessary production steps to be reduced. This is in contrast to thick film multilayer technology, in which conductor track levels, in­cluding the insulating dielectric layers, are produced by re­peated printing and sintering. With fewer production steps and by substituting screen printed for laminate dielectrics, a higher level of reliability is reached. Additional advantages are the possibilities to integrate passive components into the layered structure and fabricate a three-dimensional substrate by creating depressions. Both aspects lead to an increased packing density and therefore additional miniaturization.

Reliability and Quality Assurance. Reliability in the dis­cussed monolithic circuit and its hybrid construction has been proven clinically in more than 600,000 implants, in which re­liability can be attained with A = 10—7/h at a 90% confidence level for the hybrid circuit and A = 10—9/h for ICs and passive components. In pacemaker technology, this high reliability is not attained by the normal methods of redundancy of critical circuits and components. This is because operation time re­quirements can be fulfilled only via the current consumption aspect, because of the volume-limited battery capacity.

Instead, it is necessary to research specifically failure mechanisms and error sources and to eliminate them in the development phase as a preventative measure. Above all, it is important to provide consistent application of control mea­sures during the different phases of production (13). This ex­perience has led, for example, to special design rules during dimensioning of the current mirror circuits. This is because the design rules strongly influence the characteristics of the ECG, as well as measuring amplifiers, VCOs, and reference voltage sources. Especially critical production tolerance is also identified in this manner. A parameter drift from an ionic impurity in the semiconductor can be largely avoided by the exact control of the process parameters during chip produc­tion (14).

Quality assurance measures for pacemaker production in­clude a 100% final control of all components, semifinished products, and the finished product. In general, the military standards (MIL-STD-883 and MIL-M-38510) are used for im­plantable devices. In some cases, the specifications even ex­ceed these standards. The requirements of the standards (MIL-Q-9858 and MIL-STD-1772) must be met for the produc­tion of implantable semiconductors and hybrid circuits. All aspects of quality control and assurance are included in these measures. Standards set by the International Organization for Standardization (ISO), the ISO 9000 standards, are gain­ing importance worldwide. Quality assurance measures for the production process and measures for qualification and type testing are contained in the ISO 9002 guidelines. The ISO 9001 guidelines cover the realm of development, thereby having an effect on the design process. In addition to strict quality control during hybrid construction, it must be guaran­teed that these high standards are being met in testing the materials applied.

Input Amplifier. The input or sense amplifier must detect the electrical intrinsic cardiac activity. That is, to amplify and filter the IEGM as recorded by the electrode and to sense the intrinsic activity (P waves in the atrium or R waves in the ventricular signal). The central control unit (see Fig. 5) turns off the amplifier during the pacing impulse (blanking). Pro­tecting the amplifier and other components (e. g., the output amplifier) during use of an external defibrillator is accom­plished by discretely designed input protection diodes. The amplifier circuit triggers a comparator, which senses via a threshold value comparison. The actual electrogram contains frequency components up to approximately 100 Hz. Higher frequencies originate from interference sources (e. g., from the muscle activity). To increase the selectivity, the input ampli­fier of the discussed dual-chamber pacemaker has a bandpass consisting of a fourth-order high-pass (80 dB per decade) and a second-order low-pass (40 dB per decade), and a center fre­quency of 70 Hz on the atrial and 40 Hz on the ventricular channel. The input amplifier is constructed similarly to the other analog circuits in SC (switched capacitor) technology (5,15). This offers a number of advantages with regard to the applicable semiconductor technology (e. g., CMOS) and im­proves the tolerances, especially for implants.

Control Logic. The digital control logic is housed on the pacemaker chip with the analog components. It must coordi­nate all activities of the pacemaker (sensing and pacing in one or two chambers) according to a predefined timing scheme, so that the synchronization of the ventricles with the atria is reestablished. The control logic is therefore realized as binary automaton, meaning it can assume different states depending on timing intervals and sensed signals. The course of control is influenced by various timing intervals. Minimum and maximum pacing rates are set by the lower rate interval (LRI) and the upper rate interval (URI). The lower rate inter­val (also the basic interval or the automatic interval) is the maximum time between two intrinsic impulses of the respec­tive chamber during which no stimulus is triggered. The up­per rate interval is the shortest interval between a sensed or paced event and a (new) stimulus. The AV delay in modern pacemakers varies according to two criteria. First, the AV in­terval is shorter after a sensed event than after a paced event to compensate for the delay between the atrial stimulus and the actual atrial depolarization (latency interval compensa­tion). Second, the AV delay is shortened rate-dependently to mimic natural dromotropy, guaranteeing an optimal synchro­nization during higher heart rates (dynamic AV delay). The refractory periods for the atrial and ventricular channels (ARP and VRP, atrial/ventricular refractory period) are pro­grammable in their length and ignore sensed signals during these periods. This prevents the QRS complex or the T wave of the previous stimulus as well as afterpotentials appearing after every stimulus from being misinterpreted as sensed events and falsely inhibiting the following stimulus. Through refractory period programming, certain physiological events are blanked out, preventing these signals from being interpre­ted as intrinsic events. A relatively short blanking period pre­vents false detection of hardware activities (i. e., by the stimu­lus in the other chamber) (16).

Output Amplifier. The tissue is stimulated with an impulse whose amplitude and pulse width are adjustable typically from 0.1 V to 9.6 V and from 0.1 ms to 2 ms, respectively. Both parameters are programmable for energy efficiency. The stimulus must be sufficiently high to depolarize the tissue. That is, to increase the membrane potential from its resting value of —85 mV beyond the threshold potential to approxi­mately —65 mV. This triggers an action potential, which spreads throughout the entire myocardium. The necessary impulse energy varies on a case-by-case basis, depending on

Figure 8. Chronaxie-rheobase curve showing the relationship be­tween the pulse width and amplitude values necessary for tissue stimulation. Only typical values are shown; in practice, individual values have to be measured for each patient to determine adequate pacing parameters.

the exact position of the electrode, the thickness of the fibrotic tissue, the pacing threshold, and so on. By varying the im­pulse width and amplitude parameters, a chronaxie-rheobase relationship results. The graphical representation of this function (Fig. 8) connects pairs of values from both parame­ters that were determined experimentally for a certain pacing threshold. When the pulse width is increased up to infinity, the graph converges asymptotically toward the rheobase value. Chronaxie is the impulse duration corresponding to double the rheobase voltage. It can easily be observed that an impulse duration equaling the chronaxie at an amplitude of twice the rheobase is best from an energetic viewpoint. In practice, there is a 100% factor of safety (doubled pacing en­ergy). One of the two parameters is doubled, preferably the impulse duration, because it can be adjusted by the circuit more simply. Consequently, an impulse amplitude equaling double the rheobase value and an impulse duration equaling double the chronaxie are normally chosen. The impulse deliv­ery is realized by an output stage (pace amplifier), in which the capacitor that delivers the charge to the tissue (capacitive coupling) is charged between two stimuli. This allows charge neutrality to be reestablished by the subsequent repolariza­tion process and minimizes irreversible chemical reactions. During an impulse, a charge of 0.1 to 20 ^C is delivered. To increase the integration density, often one pace amplifier is used for both channels. Switching between atrial and ventric­ular electrodes is done by a multiplexer (5). Because the im­pulse amplitudes can be programmed up to a multiple of the battery voltage, the devices possess a voltage multiplier or charge pumps. These functions are also integrated onto the pacemaker chip.

RAIN ATTENUATION

Attenuation due to rain is made up of two components: ab­sorption and scattering. Absorption takes place when the inci­dent signal energy is transformed into mechanical energy, thereby heating the raindrop. Scattering occurs when the in­cident signal is redirected away from the desired propagation path without energy loss to the raindrop. The relative impor­tance of scattering and absorption is a function of the complex index of refraction of the raindrop and the size of the raindrop relative to the wavelength of the signal (15). The significance of the scattered component generally increases both with the signal frequency and with the size of the raindrop. In general, attenuation due to rain increases with increasing signal fre­quency for a given rain rate. Typical annual cumulative sta­tistics for frequencies of 12 GHz, 18.7 GHz, 39.6 GHz, and 49.5 GHz on paths at an elevation angle of approximately 38° in Europe are shown in Fig. 4 (some data were extracted from Ref. 16). These curves show a monotonic increase in attenua­tion with decreasing time percentage, which is typical of tem­perate climates. There is evidence, however, that in tropical, high-rain-rate regions there is a saturation effect in the atten­uation and rainfall rate statistics at low time percentages, leading to a breakpoint in the cumulative statistics (17). This and other features of high-rain-rate regions make the accu­rate prediction of attenuation due to rain very difficult for those locations.

Rain does not usually consist of a homogeneous collection of raindrops falling at a constant rate. The size, shape, tem­perature, and fall velocities usually vary in a dynamic man­ner along the path. To calculate the attenuation of a radio signal passing through rain it is necessary to invoke a drop – size distribution and to integrate the attenuation contribu­tions of the various raindrops along the path through the rain. The characteristics of rain vary so much in space and

Figure 3. Zenith attenuation due to at­mospheric gases (from Fig. 3 of Ref. 14). Curve A: standard atmosphere (7.5

g/m3); curve B: dry atmosphere. © ITU. Reproduced with permission.

Frequency (GHz)

Step 1. Calculate the effective rain height, hR, for the latitude of the station, ф:

Figure 4. Average annual cumulative statistics of total path attenu­ation at an elevation angle of about 38° in Europe (some data ex­tracted from Ref. 16).

5 – 0.075(ф – 23) for

5 for

hR (km) =| 5 for

5 + 0.1(ф + 21) for

0 for

ф> 23° Northern Hemisphere 0° < ф < 23° Northern Hemisphere

0° > ф > -23° Southern Hemisphere

-71° < ф < -21° Southern Hemisphere

ф < -71° Southern Hemisphere

Percentage of a year attenuation is exceeded

Step 2. For в a 5° compute the slant-path length, Ls, below the rain height from:

Ls = (hR – hg)/ (sinв) km

For в < 5°, the following formula is used:

Ls = [2(hR – hg)]/{[sin2 в + 2(hR – hs)/8500]1/2 + sin в} km

time that it is necessary to resort to empirical methods that employ statistical averaging. The accepted approach is to use a power law representation based on the rainfall rate R (usu­ally a rainfall rate measured at a point on the ground close to the communications link). The specific attenuation у (dB/km) in rain is related to the rainfall rate R (mm/h) by the power law relationship

Step 3. Calculate the horizontal projection, LG, of the slant- path length from:

Lg = Lg cos в km

Step 4. Obtain the rain intensity, R0.0i, exceeded for 0.01% of an average year at the site

Step 5. Calculate the reduction factor, r0.01, for 0.01% of the time for R0.01 ^ 100 mm/h

Figure 5. Schematic presentation of earth-space path (from Fig. 1 in Ref. 13). © ITU. Reproduced with permission.

Y = kR“ (dB/km) (17)

where k and a are regression coefficients (18) that take ac­count of absorption and scattering.

GASEOUS ABSORPTION

When a molecule or atom is nonsymmetrical in its structure, it will have a preferred orientation if placed in an electric field. Such molecules or atoms are said to be polar. Polar mol­ecules or atoms cause far more loss to a radio signal than nonpolar molecules or atoms, since the application of an ex­ternal field causes the polar molecules or atoms to reorient themselves. The reorientation (or relaxation) of the dipoles will remove energy from the applied field and cause heating of the medium. This is the principle of a microwave oven. The major constituents of the troposphere, oxygen and nitrogen, are electrically nonpolar and so no absorption due to electric dipole resonance will take place. Oxygen however, is a para­magnetic molecule with a permanent magnetic moment which causes resonant absorption at particular frequencies. Water and water vapor, which both contain two oxygen atoms, are therefore polar molecules and so absorption occurs due to resonance at critical frequencies.

Oxygen and Water Vapor Resonance Lines

The specific gaseous attenuation у (dB/km) is given by

Y = Yo + Yw (dB/km) (13)

where yo and yw are the specific attenuations (dB/km) due to dry air (essentially oxygen) and water vapor, respectively. The specific attenuation needs to be multiplied by the length of the path over which it operates to arrive at total path at­tenuation. On terrestrial paths, this is simply the distance between the transmitter and receiver, L (km), and the path attenuation A (dB) is given by

A = y L = (Yo + Yw )L (dB) (14)

For earth-space paths, the situation is not so straightfor­ward, since the density and make up of the atmosphere change rapidly with height. The value of L used must be able to take account of the density and other variations along the link through the atmosphere.

Figure 3, abstracted from Fig. 3 of Ref. 14, gives the total zenith gaseous attenuation at frequencies up to 1 THz (1012 Hz) for two conditions: a standard atmosphere and a dry at­mosphere. A standard atmosphere is defined as having the following surface characteristics: pressure 1013 hPa, temper­ature 15°C, and water vapor density 7.5 g/m3. In general, the dry atmosphere curve in Fig. 3 shows the resonance absorp­tion lines of oxygen, while the standard atmosphere curve is a summation of the resonance absorption lines of water vapor and oxygen. A software code (in Matlab) that calculates the total gaseous attenuation in a line-by-line fashion up to a fre­quency of 1 THz is available from the Radiocommunication Bureau of the ITU in Geneva.

For nonzenith paths, it is necessary to know not only the specific attenuation at each point in the link but also the length of the path that has this specific attenuation. To derive the incremental path lengths, ray bending through the atmo­sphere must be considered [see Fig. 1(a)]. A full procedure to accomplish this is given in Ref. 14. In this procedure, formu­lae are given for the precise calculation of yo and yw, and the total zenith attenuation is calculated from

Az = Yoho + Yw hw (dB) (15)

where ho is the equivalent height of the dry gaseous absorp­tion and hw is the equivalent height of the water vapor ab­sorption. Typical values of ho and hw are 6 km and 2.1 km (during rainy conditions), respectively. For elevation angles between 10° and 90°, a cosecant law gives the total gaseous attenuation A, namely

A = 4^- (dB) (16)

sin p

where p is the elevation angle. For elevation angles below 10°, a more accurate formula that takes account of the real length of the atmospheric path is required (14). For most earth – space systems, gaseous absorption is not significant compared with the other impairments. It also changes very little with time and so is usually relatively easy to factor into a system design.